1. Field of the Invention
The present invention relates generally to improvements in a connection structure between an electrode pad on a semiconductor device and a printed circuit pattern on a printed circuit board. More specifically, the present invention relates to improvements in a connection structure between an electrode pad and a printed circuit pattern such that repairs can easily be made to the connection structure without damaging the electrode pads or the printed circuit pattern.
2. Discussion of the Background
Chip scale type packages (CSPs) are known in the art of semiconductor device (IC chip) packages. In a chip scale type package, a rear surface of a semiconductor device is covered with a thin insulation layer except at portions serving as electrode pads. Generally, one side of an electrode pad is exposed while the other side is connected with a semiconductor circuit of the semiconductor device.
FIG. 13 shows a mounted body consisting of a semiconductor device mounted on a printed circuit board, as shown in Japanese Laid Open Patent No. 60-262430. This is an example of a mounted body of a chip scale type package. In FIG. 13, an electrode pad 5 on a semiconductor device 2 is arranged on a printed circuit pattern 3, and the printed circuit pattern 3 is electrically connected to the electrode pad 5 by way of a metal bump 29. The connection is mechanically fixed by resin 30 that is set with heat or light.
One drawback to using such a connection structure is the difficulty in repairing the mounted body once the electrode pad 5, printed circuit pattern 3, and metal bump 29 are mechanically fixed by the resin 30. That is, the mounted body is often destroyed at the electrode pad 5 and the printed circuit pattern 3 when the semiconductor device 2 is separated from the printed circuit board 1.
Similar difficulties arise when other methods are used for mounting a semiconductor device onto printed circuit patterns formed on a printed circuit board in a chip scale type package, such as in a reflow soldering method, as shown in Japanese Laid Open Patent No. 3-245558, for example. In this method, it is impossible to remove the semiconductor device from the printed circuit board without destroying the connecting portions between the printed circuit pattern on the printed circuit board and the electrode pad on the semiconductor device. As a result, repairs cannot be made to such a connection structure.
Further, similar difficulties arise when wire bonding methods, as shown in Japanese Laid Open Patent No. 3-296233, and tape automated bonding methods, as shown in Japanese Laid Open Patent No. 3-255641, are used. In these methods, it is impossible to remove the semiconductor device from the printed circuit board without destroying the connecting portions between the printed circuit pattern on the printed circuit board and the electrode pad on the semiconductor device. Therefore, repair of these types of connection structures cannot be accomplished.